RISC-V

We’re excited to share a preview of a Framework Laptop 13 Mainboard with a new CPU architecture today, and it’s probably not the one you think it is. The team at DeepComputing has built the first ever partner-developed Mainboard, and it uses a RISC-V processor! This is a huge milestone both for expanding the breadth of the Framework ecosystem and for making RISC-V more accessible than ever. We designed the Framework Laptop to enable deep flexibility and personalization, and now that extends all the way to processor architecture selection. DeepComputing is demoing an early prototype of this Mainboard in a Framework Laptop 13 at the RISC-V Summit Europe next week, and we’ll be sharing more as this program progresses.

cross-posted from: https://lemmy.ml/post/17020181

Introducing a new RISC-V Mainboard from DeepComputing

DeepComputing is preparing a RISC-V based motherboard to be used in existing Framework Laptop 13s!

Some snippets from the Framework blog post (the link to which is provided below):

The DeepComputing RISC-V Mainboard uses a JH7110 processor from StarFive which has four U74 RISC-V cores from SiFive.

This Mainboard is extremely compelling, but we want to be clear that in this generation, it is focused primarily on enabling developers, tinkerers, and hobbyists to start testing and creating on RISC-V.

DeepComputing is also working closely with the teams at Canonical and Red Hat to ensure Linux support is solid through Ubuntu and Fedora.

DeepComputing is demoing an early prototype of this Mainboard in a Framework Laptop 13 at the RISC-V Summit Europe next week.

Announcement: https://frame.work/blog/introducing-a-new-risc-v-mainboard-from-deepcomputing

The upcoming product page (no price/availability yet): https://frame.work/products/deep-computing-risc-v-mainboard

Edit: Adding link the the announcement by DeepComputing: https://deepcomputing.io/a-risc-v-world-first-independently-developed-risc-v-mainboard-for-a-framework-laptop-from-deepcomputing/

cross-posted from: https://slrpnk.net/post/10609203

Been studying RISC-V for... I think a year now. Bought the booklet outlining the ISA's modules, and have been working down from there.

I have seen various startups and actual products, as well as a bunch of simulators, but I haven't really seen any projects trying to design a RISC-V CPU from the ground up.

Are there any groups doing this? I don't think I'm at a point where I could meaningfully contribute, I'm mostly interested for educating myself.

cross-posted from: https://lemmy.ml/post/15134844

Google pulls RISC-V support from generic Android kernel

direct link to Youtube:
https://www.youtube.com/watch?v=3i12nDgzXIg

cross-posted from: https://lemmy.world/post/14636398

US government reportedly ponders crimping China's use of RISC-V

I'm asking this because I'm very new to the Yocto project. I'm going through the documentation but it's a bit overwhelming to me, looking at what Fishwaldo has achieved (link embedded in the title). I would like to learn how he did it and how I could create my own image based on a supported kernel with necessary drivers and boot the Star64 board.

From what I understand, he:

1. Forked the kernel tree and created his own branch.
2. Put in the necessary drivers (including OEM drivers) - I'm not really sure how he did it since I'm new to Linux (any tips would be appreciated!).
3. I can't quite make out the layers he used to build the minimal image (I will study the guide more to figure this out).
4. Finally, he compiled it, alongside compiling U-boot, partitioned the SD-card and booted the device.

Am I right? I'm missing a lot of steps in the middle, would really appreciate any help in understanding this. Thanks!